1. Field of the Invention
The present invention is generally related to polyemitter structures and, more particularly, to an interface layer in a polyemitter structure and its method of formation.
2. Description of the Prior Art
Polycrystalline silicon (polysilicon) and single-crystal silicon have been investigated for many years because of their importance in semiconductor device manufacturing. Polysilicon films have been used in the past as a contact to the emitter and base of a transistor. The presence of an interface layer between the polysilicon and the emitter results in enhanced bipolar transistor current gain (See, de Graff et al., IEEE Trans. Electron. Devices, ED-26, 1771 (1979)). As is explained in Ronsheim et al., J. Appl. Phys., 69(1) 495-498 (1991), which is herein incorporated by reference, an oxide interface layer provides a barrier which reduces hole injection from the base to the emitter contact.
The use of an interfacial oxide to adjust the current gain of a bipolar transistor requires control of the thickness and continuity of the oxide film if device uniformity is to be achieved. However, achieving good control is often difficult and poses a major problem in polyemitter processing. If a cleaned silicon wafer is subsequently exposed to air, a native SiO.sub.x layer containing mostly oxygen with small amounts carbon, fluorine, aluminum, chlorine, and arsenic of will form. Similar to that described in Kern et al., R. C. A. Rev., 31, 187 (1970), which is herein incorporated by reference, wafers are typically cleaned using an "RCA" cleaning procedure which is performed by successively exposing a silicon wafer to NaOH, H.sub.2 O.sub.2, H.sub.2 O, HCl, H.sub.2 O.sub.2, and H.sub.2 O possibly followed by exposure to HF and an H.sub.2 O rinse. The thickness of the native SiO.sub.x layer grown after cleaning is dependent upon the time between cleaning the silicon wafer and deposition of the polysilicon, as well as the temperature and H.sub.2 O and O.sub.2 partial pressures the wafer is exposed to primor to deposition. A large contribution to the total oxide layer can occur during the loading of the wafers in the low pressure chemical vapor deposition (LPCVD) chamber. The loading process can also produce large SiO.sub.x thickness variations, since the wafers loaded in the LPCVD chamber first will be exposed to a higher temperature for a longer period of time than the wafers loaded last. Generally, the native layer is on the order of 3-12 .ANG. thick.
In order for the interface layer to fulfill its electrical function of acting as a barrier which reduces the transport of holes from the base to the emitter contact while still maintaining high electron conduction, the oxide layer needs to have an integrated oxygen content on the order of 10.sup.15 cm.sup.-2. The importance of the integrated oxygen content is discussed in Ronsheim et al., J. Appl. Phys., 69(1) 495-498 (1991), noted above. If a silicon wafer is cleaned and exposed to HF and subsequently dried under nitrogen without an additional water wash or exposure to ambient air, the oxide layer remaining on the silicon will typically contain less than 7*10.sup.14 cm.sup.-2, which is approximately three times lower than the optimal oxygen content of the interfacial layer. If a polysilicon emitter were deposited on an oxide layer having such a low oxygen content, devices with low .beta. values (i.e., .beta.&lt;50) will result because of the excessive back injection of holes from the base to the emitter contact.
N-type microcrystalline hydroganated silicon (n-.mu.c-Si:H) has been under recent investigation. Previous reports of the band structure between n-.mu.c-Si:H and crystalline silicon (c-Si) have shown that the band discontinuity occurs almost entirely in the valence band. Because there is minimal discontinuity in the conduction band, there should be minimal suppression to electron conduction. Fujitsu & Talasaki, Characteristics of Si HBT with Hydrogenated Micro-Crystalline Si Emitter, 24 Fujitsu Sci. Tech. J. 391-7 (1988), for example, disclose a wide-band gap emitter in which a n-.mu.c-Si:H film is deposited onto crystalline Si in a plasma CVD system and A1 is deposited as an emitter contact by sputtering. Fujitsu et al. does not mention the use of thin films or n-.mu.c-Si:H in polyemitters or the use of n-.mu.c-Si:H in combination with polysilicon contacts, nor does Fujitsu et al. discuss critical ratios of gases, power density and pressure which are required to produce thin films of n-.mu.c-Si:H. Other previously reported work on n-.mu.c-Si:H emitter contacts has focussed on thick (350 .ANG.) contact layers. Thick layers of n-.mu.c-Si:H are not desirable because they contribute to a large emitter resistance.